Improved force-directed scheduling in high-throughput digital signal processing

W.F.J. Verhaegh, P.E.R. Lippens, E.H.L. Aarts, J.H.M. Korst, J. Meerbergen van, A. Werf van der

Research output: Contribution to journalArticleScientificpeer-review

Abstract

This paper discusses improved force-directed scheduling and its application in the design of high-throughput DSP systems, such as real-time video VLSL circuits. We present a mathematical justification of the technique of force-directed scheduling, introduced by Paulin and Knight (1989), and we show how the algorithm can be used to find cost-effective time assignments and resource allocations, allowing trade-offs between processing units and memories. Furthermore, we present modifications that improve the effectiveness and the efficiency of the algorithm. The significance of the improvements is illustrated by an empirical performance analysis based on a number of problem instances
Original languageEnglish
Pages (from-to)945-960
Number of pages16
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume14
Issue number8
DOIs
Publication statusPublished - 1995
Externally publishedYes

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Digital signal processing
Scheduling
Throughput
Resource allocation
Data storage equipment
Networks (circuits)
Processing
Costs

Cite this

Verhaegh, W.F.J. ; Lippens, P.E.R. ; Aarts, E.H.L. ; Korst, J.H.M. ; Meerbergen van, J. ; Werf van der, A. / Improved force-directed scheduling in high-throughput digital signal processing. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 1995 ; Vol. 14, No. 8. pp. 945-960.
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Improved force-directed scheduling in high-throughput digital signal processing. / Verhaegh, W.F.J.; Lippens, P.E.R.; Aarts, E.H.L.; Korst, J.H.M.; Meerbergen van, J.; Werf van der, A.

In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 14, No. 8, 1995, p. 945-960.

Research output: Contribution to journalArticleScientificpeer-review

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